Verification

Together with renowned customers from the semiconductor industry, El Camino began working on Coverage-Driven / Constraint-Random Verification very early on. Since 2000 we have been a Verification Alliance partner and have applied or introduced this methodology in numerous projects to date, and have trained well over a hundred verification engineers in this field.

Whether Open or Universal Verification Methodology (OVM/UVM) or Metric Driven Verification (MDV), El Camino is the right contact for application in the following areas:

• Virtual Prototype
• HW Simulation / Acceleration / Emulation
• FPGA Prototype
• HW/SW co-verification
• Embedded Software
• Up to extremely complex systems such as a mobile phone base station.

When designing Verification IP, we generally rely on the Universal Verification Methodology (UVM) standard. In addition, we also offer formal verification and traditional directed tests in the area of ​​hardware design. Our engineers, who specialize in embedded software testing, are ISTQB® Certified.

In our Verification division, El Camino offers comprehensive expertise with the following methods and languages:

• Methods
  • Open / Universal Verification Methodology ( OVM / UVM )
  • Metric Driven Verification ( MDV )
  • Assertion Based Verification
  • Formal Verification
  • Directed Tests
• Languages
  • e language / SystemVerilog
  • SystemC / C++ / C
  • Verilog / VHDL
  • PSL, SystemVerilog Assertions