Course Descriptions

Workshops:

Workshop Duration Description
SoC Workshop
Developing with Altera ARM-based SoCs
2 days
Mastering Timing Analysis and Timing Closure in Altera FPGAs 2 days
Building Gigabit Interfaces in 28-nm Devices 1 day
Building Interfaces with Arria 10 High-Speed Transceivers 1 day
VHDL Workshop 3 days
System-On-Chip / NIOS II Workshop 2 days
Platform Desginer (fka Qsys) Workshop 2 days
Quartus Prime Foundation Workshop 3 days
Quartus Prime Advanced Workshop 3 days
Verilog Workshop 3 days

Individual Modules

Development Tools Duartion Description
The Intel® Quartus® Prime Software Design Series: Foundation 1 day
Intel® Quartus® Prime Software: Pro Edition Features for High-End Designs 1 day
The Intel® Quartus® Prime Software Design Series: Timing Analysis 1 day
Advanced Timing Analysis with TimeQuest 1 day
Timing Closure with Quartus II Software 1 day
Design Optimization Using Incremental Compilation 1 day
Hardware Description Languages Duration Description
Introduction to High-Level Synthesis (HLS) with Intel FPGAs 1 day
High-Level Synthesis (HLS) Advanced Optimization Techniques 1 day
Introduction to VHDL 1 day
Advanced VHDL Design Techniques 1 day
Introduction to Verilog 1 day
Advanced Verilog Design Techniques 1 day
Introduction to OpenCL for Altera FPGAs 1 day
Optimizing OpenCL for Altera FPGAs 1 day
System Design Duration Description
Introduction to the Platform Designer System Integration Tool 1 day
Advanced Qsys System Integration Tool Methodologies 1 day
Designing with NIOS II 1 day
Developing Software for the NIOS II Processor 1 day
Performance Optimization with Stratix 10 HyperFlex Architecture 1 day
Advanced Optimization with Stratix 10 HyperFlex Architecture 1 day
Designing with DSP Builder Advanced Blockset 1 day
Interfacing to External Memory with Altera FPGAs 1 day
Developing a Custom OpenCL BSP 1 day